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For customer access to Toshiba ASIC Design Documents, click here.
Toshiba is focused on predictable, yield-centric, first-time right designs that result in increased productivity and quality ASICs and System-on-Chips. The Toshiba design methodology reduces design time and iterations by employing premier EDA technology and solution-focused engineering expertise.
Highlights
  • Support for state-of-the-art, deep-submicron process technologies for digital consumer, networking and information system applications
  • Best-in-class EDA technology that is selected only after extensive evaluation and testing
  • Commercial tools are supplemented with Toshiba proprietary technology that employ silicon-intimate utilities and technologies
  • A comprehensive ASIC design methodology that readily supports flat, hierarchical and mixed-signal designs
  • The Toshiba flow incorporates signal integrity and power analysis tools from leading EDA companies
  • Toshiba works closely with its customers from start to finish and provides an open, flexible, adaptable and seamless design flow
Implementation Methodology Overview
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Implementation Tools
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Continuous Collaboration
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Logic Design Tools    
   
Synthesis
  Synopsis Design Compiler
  Magma Blast Create
Delay Calculation
  Synopsys PrimeTime (not sign-off)
  Toshiba NDM Delay Calculator (sign-off)
Simulation
  Cadence Verilog-XL, NC-Verilog, NC-SIM,
NC-VHDL
  Synopsys VCS
  Mentor/ModelSim
Static timing analysis
  Synopsys PrimeTime (sign-off)
  Magma Blast Logic (not sign-off)
Power analysis
  Sequence PowerTheater
Power optimization
  Synopsys Power Compiler
Formal verification
  Cadence Conformal LEC (Logic Equivalence Checking)
  Synopsys Formality
 
   
Rules Check
  RTL
    Atrenta SpyGlass
  DFT Rules
    Synopsis DFT Compiler, Tetramax
    Atrenta SpyGlass (Toshiba rules)
  Netlist Rules
    Toshiba NDM Dver Design Verifier
Constraints Check
  Magma Blast Logic
  Atrenta SDC checker
DFT circuitry insertion
  Scan
    Synopsys DFT Compiler
    Mentor DFT Compiler
  Boundary scan, JTAG
    Synopsys BSD Compiler
  Memory BIST
    Toshiba RAMBIST
  Logic BIST
    Synopsys SOCBIST
ATPG test pattern generation
  Synopsys TetraMAX
  Mentor FastScan