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There
are a number of factors to consider when selecting
an optimal package configuration: I/O requirement,
package footprint/form factor, thermal dissipation,
electrical performance, and cost—to name a
few. With ASICs now being introduced exceeding
16-million gate and operating at clock frequencies
of 250 MHz and beyond, accurate package data
and selection is critical. To meet system-level
performance and density requirements, packages
with better thermal and electrical characteristics
that do not impact the performance of the die
are needed.
New advanced packaging technologies, such as
Chip Scale Package (CSP) are currently available
to meet the ever-increasing market demand
for smaller size, more I/Os, and lower cost.
Toshiba offers a broad and varied range of package
options for all ASIC families to suit
all applications. Whether your design requires
a 16-lead DIP or 2304-PBGA[FC], Toshiba offers
expert guidance and innovative solutions
to help you achieve your design goals.
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