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Toggle-Mode NAND
Related Information
Toggle-Mode Double Data Rate NAND Flash - For Improved Performance
MLC and SLC Lineup of Asynchronous DDR NAND for Fast Data Transfers

Toshiba offers a full lineup of 32nm DDR Toggle-Mode NAND, in MLC versions with densities of 64Gb1, 128Gb and 256Gb and SLC versions with densities of 32Gb, 64Gb and 128Gb. Toggle-Mode NAND is a DDR NAND solution designed to consume less power than synchronous DDR NAND flash by eliminating the clock signal typically used in synchronous DDR memories.

Toshiba DDR Toggle-Mode 1.0 NAND has a fast interface, rated at 133 megatransfers/second2 (MT/s), as compared to 40MT/s for legacy SLC single data rate NAN. This makes it suitable for high performance solid state storage applications, including enterprise storage.

With an asynchronous interface similar to that used in conventional NAND, the Toggle-Mode DDR Flash NAND requires no clock signal, which means that it uses less power and has a simpler system design when compared to competing synchronous NAND alternatives. The DDR interface in Toggle-Mode NAND uses a Bidirectional DQS to generate input/output signals (I/Os) using the rising and falling edge of the write erase signal.

The bi-directional data signal also ensures scalability to future higher frequency operations. Toshiba is working with JEDEC on a new standard for the most advanced high-performance NAND flash memory, a DDR NAND flash with a 400Mbps3 interface. This next generation Toggle-Mode DDR NAND 2.0 is targeted to provide a three-fold increase in interface speed over Toggle DDR 1.0, and a ten-fold increase over the 40Mbps single data rate NAND that is widely used today.

Type Density Configuration Page/Block Size Package Vcc VccQ
SLC 32Gb (4GB)(1) 2st/2CE 8kB/512kB 132 BGA 2.7-3.6 1.8
3.3
64Gb (8GB) 4st/4CE 8kB/512kB 132 BGA 2.7-3.6 1.8
3.3
128Gb (16GB) 8st/4CE 8kB/512kB 132 BGA 2.7-3.6 1.8
3.3
MLC 64Gb (8GB) 2st/2CE 8kB/1MB 132 BGA 2.7-3.6 1.8
3.3
128Gb (16GB) 4st/4CE 8kB/1MB 132 BGA 2.7-3.6 1.8
3.3
256Gb (32GB) 8st/4CE 8kB/1MB 132 BGA 2.7-3.6 1.8
3.3

1 Product density is identified based on the maximum density of memory chip(s) within the Product, not the amount of memory capacity available for data storage by the end user. Consumer-usable capacity will be less due to overhead data areas, formatting, bad blocks, and other constraints, and may also vary based on the host device and application.

2 Megatransfers (MT) per second refer to the number of data transssfers (or data samples) captured per second, with each sample occurring at the clock edge. In a double data rate system, the data is transferred on both the rising and falling edge of the clock signal. For purposes of measuring data transfers in this context, 1 Megatransfer equals 1,000,000 transfers per second. Actual data transfer speed may vary depending on the device, read and write conditions, and file size.

3 Mbps, or megabit per second. For purposes of measuring read and write speed in this context, 1 megabit or Mb = 1,000,000 bits. Maximum read and write speed may vary depending on the device, read and write conditions, and file size.