Principal Verification Engineer
Take active responsibility in the functional verification of all stages of a product development, from RTL design verification at block level to full chip verification at system level. Actively contribute to the implementation of an integrated platform suitable for both horizontal reuse (across all the different levels of design abstraction), and vertical reuse (across multiple evolution of the product). Insure the cascaded deployment of the integrated platform, and best design practice methodology for efficient verification. Provide leadership role to junior verification engineers and contractors to insure the proper execution of the action plan at the team level.
Leadership and Planning
This is not a management role, we seek individual contributors with great leadership skills
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