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Job Description
Req No: 3060
Location: San Jose, CA
Title: Memory Architect
Job Type: Full Time
Education Requirements: MS Electrical Engineering
BS Electrical Engineering
 
Job Description:

Memory Architect

  • As a Memory architect, you will be responsible for providing technical expertise and support on initiatives involving Toshiba's upcoming non-volatile memory (NVM) replacement for DRAM (e.g. MRAM, ReRAM, etc.)
  • Understanding of DRAM applications in Enterprise Server or Client PC architecture is required while understanding of DRAM use in Cloud, Hyperscale, and mobile architectures is highly desirable
  • Leverage the system level technical expertise to enhance the design and specification of upcoming Toshiba NVM memory
  • In addition to technical expertise the Memory Architect will collaborate with Design Engineering and Applications to distill customer use cases, spec and requirements into non-volatile memory level requirements
  • The candidate will work with key internal and external technical leaders and architects to influence Toshiba's NVM strategy
  • Duties & Responsibilities:

  • Be the leader for influencing Toshiba's non-volatile memory (NVM) and memory solutions for Enterprise, Hyperscale, Client/PC and mobile markets
  • Maintain strong understanding of PC and server processor architecture together with role of caching hierarchy, system memory and storage
  • Be the expert for understanding and explaining how customer applications and system can leverage non-volatile memory in place of DRAM
  • Maintain deep knowledge of DRAM component and DRAM DIMM specs to ensure upcoming replacement non-volatile memory meets industry specs
  • Maintain strong knowledge of Non-volatile Memory from competition and overall competitive Non-volatile Memory landscape
  • Be the expert for guiding non-volatile memory application and development teams for most effective Non-volatile Memory optimizations
  • Be the expert to explain ecosystem changes required for introducing non-volatile Memory into Server/PC architectures; Participate
  • EOE/AA M/F/D/V
     
    Required Experience:
     

  • The candidate will have expert level understanding of PC and server processor architecture together with role of caching hierarchy, system memory and system level tradeoffs
  • The candidate will have good understanding of using DRAM component spec, DRAM operation and tradeoffs associated with using DRAM in the system
  • The candidate will have a good understanding of DRAM use at processor cache level, component level, DIMM level and system level. Understanding of on-chip and off-chip memory (DRAM, SRAM, etc.) and use in various markets (Networking, Enterprise Server, Storage, mobile etc.) is a plus
  • Strong understanding of DRAM operation, characteristics and limitations (refresh, power, multiple levels, etc.) together with system and DIMM level techniques to overcome these limitations
  • Good knowledge of Server/PC BIOS, Operating Systems (OS) and how applications interact with these
  • Understanding of Software stack (Programming models and Filesystems) is a strong plus
  • Knowledge of how DRAM is used in various applications and end markets is a plus
  • Apply knowledge of system architecture to help NVM development team make NVM parameter tradeoffs
  • Ability to uncover business and technical challenges and propose solutions to address these challenges
  • Proven track record of working across disparate teams to accomplish goals
  •  
    Other Experience:
     

    You must apply through the Toshiba site to be considered an applicant for this role. Please do not just send your resume.

     
     
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