Article Summary

“IBM and team open gates on 32nm development,” TechCentral, April 18, 2008. In this continuing coverage TechCentra reported that a research team lead by IBM has moved closer to developing a 32nm processor. The team, which includes Samsung, STMicroelectronics and Toshiba, is ready to begin working with hardware vendors to design the first chips with the 32nm manufacturing process.  This will allow OEMs to begin working on the first generation of chips built from the process. The group expects the first prototypes to arrive in the third quarter of 2008.  IBM claims that the new chips will offer a performance boost of roughly 35% and a 35-50% drop in power consumption over the current 45nm process. "These early High-K/metal gate results demonstrate that by working together we can deliver leading-edge technologies that surpass others in the industry," said Gary Patton, vice president of IBM's semiconductor research and development centre.


“Sony sells fab to Toshiba for $833M, confirms PlayStation chip joint venture,” EDN, February 20, 2008. Toshiba Corp, Sony Corp, and Sony Computer Entertainment Inc (SCEI) today detailed an agreement that will see Toshiba buy a Sony 300-mm fab and see the trio form a joint venture for the production of high-performance semiconductors, including products for SCEI's PlayStation gaming system. By March 31, Toshiba will acquire from Sony and SCK the 300-mm wafer line installed in SCK's Nagasaki Technology Center Fab 2, with the exception of some equipment, for approximately $833 million (90 billion yen). Toshiba said it plans to loan the fab to the joint venture at the start of operation. As originally planned, the joint venture will initially focus on the Cell Broadband Engine (Cell/BE) processor, which is used in the PlayStation system, and the RSX graphics engine.  Manufacturing will start with 65-nm process, and the joint venture will promote migration to 45-nm process mass production, in cooperation with Toshiba's system LSI manufacturing operation in Oita, Japan. No timeline for the move to 45-nm production was given.

 

 

"Limited Space, Maximum Functionality," Embedded Computing Design October 01, 2007.
According to this article, embedded computing systems designers are often tasked with putting as much functionality into a space -challenged device as possible, whether that device is a chip, board, or system.  Trying to determine which products might give the most bang for the space available in the embedded computing element can be quite difficult.  The special feature discussed functional density including considerations such as weight, size and life-cycle cost as some of the most crucial factors.  The article also stated that chip designers have their own challenges in the area. "No one magic answer or solution exists when it comes to creating a functionally dense component, platform or system," stated Rakesh Sethi, PhD, director of business development in the Custom SoC and Foundry Business Unit at Toshiba America Electronic Components.

 

High-k Push Brings High Anxiety as 32 nm Looms, EETimes, December, 17, 2007
Article Excerpt:
Based on input from our customers, the demand for high-k materials only arises when working with process technologies below 32 nm. At larger process nodes, the benefits of using high-k materials are unclear, so therefore we have not experienced any customer demand," said Rakesh Sethi, director of business development for the Custom SoC and Foundry Business Unit at Toshiba America Electronic Components Inc. (Irvine, Calif.).
See EETimes website for complete article.