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Pointers
and Pitfalls
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Impact of Multiple-Voltage Domain (Multi-VDD) Design
Implementation on Large, Complex SoCs
Advanced multi-voltage domain (multi-VDD) architectures allow designers to implement large, complex SoCs that consume the lowest possible amounts of power, while delivering the required performance and functionality. Not unexpectedly, implementing a low power, multi-VDD voltage area [VA] requires careful planning and early design architecture considerations, as well as considerable analysis.
In order to maximize device performance and reliability, the design should be optimally divided into suitable voltage areas for maximum power savings through RTL power simulation. A blueprint of the initial design modules with its various level shifter / isolation cells and proper control signals is necessary. Since multi-VDD methodology allows voltages to vary in different regions, simulation is very important to make sure that the VA design function is correct. This includes the determination of correct power-on and power-off sequence between the VAs to avoid an incorrect or floating state during operation.
Once the VA design is implemented, it needs to be verified extensively for possible violations between the different power domains. Toshiba has a well-developed, low-power design flow, which utilizes several tools for proper implementation and verification of a multi-VDD voltage area design.
Multi-VDD Terminology
Voltage Area
- A design divided into separate voltage islands based on functionality, power requirement, timing, speed, etc.
- Each voltage area has its own separate supply power net.
- Voltage areas can be either at the same voltage level as others (example 1) or have different voltages (example 2).
- The appropriate voltage area(s) may be completely shut down or may be switched to a lower voltage for a certain amount of time, saving power.
- When higher performance is required the voltage domain will be switched to a higher voltage.
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Single-VDD VA
- Design has separate supply nets for each voltage area (VA), but all power nets have the same voltage level.
- The appropriate voltage area can be shut down for a certain amount of time, saving power.
Multi-VDD VA
- Design has different voltage areas and each has a separate power supply. The voltage in each area could be different from the others.
- The appropriate voltage area may be switched to a lower voltage or may be completely shut down for certain amount of time, saving power.
- When higher performance is required the voltage domain will be switched to a higher voltage.
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Voltage Areas Can Match or Have Different Voltages >>
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High-Level Multi-VDD Steps Using Blast Fusion as an Example >>
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Multi-VDD Pointers
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DO: Divide the design into voltage area (VA) modules, each having its own separate power supply, early in the design process—such as the RTL stage. This power-savings allowance permits some modules to be shut off, while the other modules are working. |
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DO: Make sure that the VA modules, which would be shutoff, can be turned off for at least a certain minimum amount of time, so that there is reasonable power savings. A power simulation at RTL phase is a good idea. |
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DO: Decide early whether the power supply for the VA modules are controlled externally off-chip or internally on-chip. |
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DO: Be aware that a VA operating at a lower voltage will have substantially lower performance. A VA with supply reduced from 1.2v to 1.0v is about 16%, but the degradation in speed will be much more than 16%. |
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DO: The voltage levels between different VAs could be different. E.g., VA1 = 1.0v constant, VA2 = 1.2v constant, VA3 = 1.0v/0v shutoff. But the same VA cannot have two different voltages. E.g., VA4 = 1.0v/1.2v. |
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DO: You can have a VA module nested inside another VA and each could be independently operated in terms of power supply. |
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DO: A VA module could have physically different floorplans at different locations of the chip. E.g., VA1 can have FP1, FP2 etc. |
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DO: A VA module can consist of “leaf” cells such as SRAMs, PLLs, etc. Typically they’re comprised of an entire design hierarchy or module. |
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Multi-VDD Pitfalls
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DON'T: Divide the design into too many VA modules as it becomes difficult to manage the power supply as well as implementing the design. |
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DON'T: Create VA modules that are too small in size. A module with only a few big DRAMS and PLL is okay, as it physically occupies a large area of the chip. But a VA module with just a few flip-flops plus some other standard cells should be avoided. |
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DON'T: A VA having several floorplans cannot have different supply nets. All floorplans of the same VA should have the same supply net. |
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