We noticed that there are several
Frequently Asked Questions (FAQs) posed by job seekers.
We have provided answers to some of the questions
asked by candidates when they consider employment
at TAEC.
1.
What
are Neuron Chips?
Neuron Chips are cost-effective, optimized microcontrollers
incorporated in leading-edge distributed intelligent control
networks. They enable "smarts" to be built into everyday electronic
devices and enable these devices to communicate with each other.
Millions of Neuron Chips are already in use worldwide in buildings,
factories, trains, homes, planes, and hundreds of other applications.
Neuron Chips communicate with each other using Echelon's LONWORKS
protocol, which is an open, interoperable control-networking
standard that enables users to connect a broad range of LONWORKS
compatible products in a peer-to-peer networked environment.
2.
What
is LON and LONWORKS?
LON is an acronym for Local Operating Network.
· The LONWORKS system, developed by Echelon Corporation, is recognized
internationally as a standard for interoperable control networks. With thousands
of application developers and millions of devices installed worldwide, the LONWORKS
system is a leading open, networked control solution for building and home automation,
industrial, transportation, and public utility applications. Toshiba has supported
development of LONWORKS technology since its inception in 1990.
3.
What types of Neuron Chips does Toshiba
offer?
Toshiba offers a range of Neuron Chips for a
variety of applications.
These include TMPN3150B1AF, TMPN3120B1AM, TMPN3120E1M, TMPN3120A20U,
TMPN3120A20M, TMPN3120FE3U, TMPN3120FE3M and the TMPN3120FE5M.
Please refer to the Product Selection Guide for more details.
4.
What
is Toshiba's relationship with the Echelon Corporation?
Toshiba has licensed the LONWORKS technology form Echelon,
and has been developing the Neuron Chips in partnership with
Echelon since 1990. Toshiba recently renewed its commitment
to this technology by extending the license agreement with
Echelon for the next 10 years.
5.
What
are Toshiba's main strengths in Neuron Chips?
Toshiba has 10 years experience with the Neuron and LONWORKS
technology, and has been a leading supplier of Neuron Chips
since 1992.
6.
How
does Toshiba differentiate itself with its Neuron Chips?
Toshiba has introduced several new Neuron derivatives to meet
the demands of the growing LONWORKS market. In the last year,
Toshiba has expanded the Neuron product line from three to
eight parts, which included new features such as additional
memory, faster clock speed, small package option, and an
on-chip
transceiver for non-isolated communication.
7.
What are the applications for Neuron Chips?
Toshiba's Neuron Chips are targeted toward applications in
building automation such as HVAC and lighting systems, fire
and security alarms, access control, power metering, and
load
management, as well as industrial automation, transportation,
utilities and home automation.
8.
What process technology does Toshiba use
for manufacturing its Neuron Chips?
Toshiba uses 0.8-micron process technology for the Neuron
Chips.
9.
What
are Toshiba's future plans for its Neuron Chips?
Toshiba will continue to grow the Neuron market by working
with both existing and new customers to get new design-wins
using the Neuron Chip technology, especially with the recently
introduced 3120 Class Neurons derivatives. Toshiba will compile
a market analysis to evaluate new features and requirements
for future products that will enable adoption of this technology
in new market segments.
10.
What are the advantages of increased ROM
available in the 3120 Neuron Chips?
The new 3120 Neuron chips have 16K ROM, which contains many
system functions not present in the earlier 10K ROM versions
of the 3120 chip. The new ROM includes floating point, 32
bit arithmetic functions, self-installation functions, I/O
drivers and support functions. The arithmetic and self-installation
functions in particular are most likely to be used by a low-cost
sensor or controller node.
Earlier versions of the Neuron 3120 Chip have
a 10K ROM for the system image. If the application
requires system functions that are not present
in the on-chip ROM, these must be brought in from
a library and loaded into the on-chip EEPROM.
11.
Can the additional ROM be used for application
programs?
The additional ROM cannot be used for application code. However,
the additional system functions available in the 16K ROM
will
free up space that would have otherwise been required in
the
EEPROM, thus allowing larger application program space in
the EEPROM.
12.
What is the life cycle of EEPROM?
EEPROM is rated for 10,000 write cycles, at worst case.
13.
What
specific functions are included in the additional ROM?
The additional 6KB of ROM contain the following system
functions:
· Arithmetic functions
muldiv, muldivs, muldiv24 and muldiv24s for fixed-point scaling
Bit and byte arrays
Character string manipulation functions
All floating point functions except ASCII conversions
All 32-bit signed functions except ASCII conversions
· Self-installation functions
Access/update domain
Access/update address
Access/update NV config
Access/update NV alias
Send service pin message
· Miscellaneous
Support functions that did not fit into the 10K ROM
14.
Does the on-board low voltage detector (LVD)
eliminate the need for external reset logic?
For 3150 class Neurons, an external LVD is
needed only when using flash memory.
For 3120
class Neurons, an external LVD is needed
only when operating at 20 MHz
15.
Is
there any difference in external LVD requirements between
Motorola and Toshiba Neuron Chips?
Toshiba's Neuron Chips require external LVD only if operating
at 20MHz, or when using external flash memory.
16.
What
is the Programmable LVD option on new 3120 Neuron Chips?
The existing LVD on the Neuron Chips trip whenever the Vdd
input is less than 3.8 ~ 4.5V. The programmable LVD feature
allows the user to select a higher trip voltage, if necessary.
One of the Vdd pins of the 3120 chips is reassigned as the
LVD control pin (LVDin). The programmable LVD trips if the
LVDin input is below 1.2 ± 0.2V or Vdd is below 3.8
~ 4.5V. This behavior is backward compatible with earlier
Neuron Chips; if the LVDin input is connected to Vdd, only
the LVD of Vdd is operational. The LVDin is pin 2 for the
SOP-32 package, and pin 41 for the QFP-44 package.
17.
How
is programmable LVD used?
The following figure is the example that supplies the power
supply to Vdd via a regulator from the external power supply
of high voltage. In this example, time lag may occur by the
time Vdd falls from a fall of an external power supply. In
such a case, a reset can be promptly applied to a Neuron
Chip
by connecting LVDin to an external power-supply side and
thereby
reducing the risk of miswriting at the time of writing the
EEPROM.
Vout * 4 / (21 + 4) V is inputted into LVDin by resistance division. Since the
reset range of LVDin is 1.2±0.2V, it is reset by Vout?7.5±1.25V
in this case.
18.
What
are the improvements to the Reset Circuit of the new Neuron
3120s?
The external reset signal is synchronized internally
with the Neuron Chip system clock. All resets (LVD, Watchdog,
Software and external) are now synchronized, improving EEPROM
reliability. The reset signal can be asserted for either
3
clock cycles (same as earlier Neurons), or minimum 50 msec.
This feature is controlled by bit 0 of I/O address 0xFFF5
as follows: 0 = 50 msec (default), 1 = 3 cycles. After a
power-on
reset, this control bit is cleared, setting the reset time
to the default value of 50 msec. If you would like to use
the shorter (3 cycle) reset time in your application, you
should set the control bit in its reset processing task.
Example:
when( reset ) {
*(int *)0xFFF5 = 1;
}
19.
Why
does my node not start after a reset?
If you are using TMPN3120A20x, TMPN3120FE3x or TMPN3120FE5M,
make sure the internal clock is not stopped during the reset.
The reset operation of new Neuron 3120 is synchronized internally
with the Neuron Chip system clock. Therefore, It is required
to supply the input clock to the Neuron 3120 because of releasing
the reset. It cannot be recommended stopping the clock supply
during a reset for the purpose, such as reduction of power
consumption.
20.
What
is the initialization time after a reset?
Why is a message not received immediately after the reset?
The initialization time is as follows:
Initialization times (Approx.)
TMPN3120B1AM
37ms
TMPN3120E1M
47ms
TMPN3120A20M/TMPN3120A20U
47ms
TMPN3120FE3M/TMPN3120FE3U
82ms
TMPN3120FE5M
137ms
TMPN3150B1AF
70ms
Note: *The above values are for reference only, and may
change according to conditions.
*For TMPN3150B1AF, the value assumes no external RAM, no boot option.
*For more details, refer to "12.6 Reset Process and Timing" in Data Book "Neuron
Chip TMPN3150/3120".
The initialization time after a reset may become longer because of increased
EEPROM and RAM at TMPN3120FE3x and TMPN3120FE5M. Neuron Chip's I/O and communication
will not operate during the initialization time. Due to this reason, when a
message is immediately sent to the Neuron Chip after reset, it may not be received.
Processing of I/O immediately after reset may also cause a problem.
21.
A
node repeats a reset action. What is the reason that often
exists?
First, in order to recognize whether the cause of reset
is a Neuron Chip, or an external factor, please check the
following point:
Isn't Low signal being inputted into the reset pin
of a Neuron Chip from external device?
Is Vdd kept at more than 4.5V?
Is LVDin kept at more than 1.4V?
When your node does not correspond to these, the Neuron Chip itself may be performing
the reset action. There are watchdog reset and software reset in this case. The
main causes which require these reset are as follows:
When the parallel I/O object is being used, the communication
with host CPU is imperfect. (Host CPU is not operating,
Violation of access timing, etc.)
When the I2C I/O object is being used, the timeout error
has happened.
Your node has repeated transmission to the network where
communication load is very high. (Preemption timeout error)
There is a sequence (loop) that remains without a clearance
of a watch dock timer for a long time (0.84 sec. @ 10MHz)
in the same task. - 33,333 (32,767 @ 20MHz) or more value
is specified to delay( ).
22.
Why
does my node not start after a reset?
If you are using TMPN3120A20x, TMPN3120FE3x or TMPN3120FE5M,
make sure the internal clock is not stopped during the reset.
The reset operation of new Neuron 3120 is synchronized internally
with the Neuron Chip system clock. Therefore, It is required
to supply the input clock to the Neuron 3120 because of releasing
the reset. It cannot be recommended stopping the clock supply
during a reset for the purpose, such as reduction of power
consumption.
23.
What
is Enhanced Communication Port (ECP)?
ECP is the communication port of TMPN3120A20M, TMPN3120A20U
and TMPN3120FE5M. ECP has improved characteristics over
the standard communication port, which is in the other
Neuron Chips from Toshiba (TMPN3120B1AM, TMPN3120E1M, TMPN3120FE3M,
TMPN3120FE3U and TMPN3150B1AF). The specifications of the
enhanced communications port and the standard Neuron Chip
communication port are shown in the following table.
standard type
ECP
Unit
Common mode range(With hysteresis)
Min.
Vss+1.2
Vss+0.45
V
Max.
Vdd-2.2
Vdd+0.55
Common mode range(No hysteresis)
Min.
Vss+0.9
Vss-0.1
V
Max.
Vdd-1.75
Vdd+1.0V(COMM)7.0
Input offset voltage
Min.
-0.05?Vh-35
mV
Max.
0.05?Vh+35
Input resistance(at Vss to Vdd level)
Min
5 (1)
5 (2)
M-Ohm
Note: (1) This value applies to CP0-CP3 pins of
TMPN3120FE3M/U at power down. (2) This value applies to CP0-CP3 pins at power
up and down. (Vss?Vin?7.0V)
s The common mode range in the case of ECP is about 3 times compared to that
standard type communication port. This increases the margin to which the ground
level of each node may vary, when connected using a non-isolated direct connect
transceiver.
24.
What
is the default communication setting for the Neuron 3120s?
The factory default communication setting for Neuron 3120s
is 1.25 Mb/s. To change this setting, you will need to
use the Neuron Programmer. Please refer to the Neuron Programming
section for more details.
25.
Can
the Neuron 3120s be pre-programmed to another communication
setting from the factory?
No. The default communication setting for Neuron 3120s
is 1.25 Mb/s. For other communication speeds, you have
to use the Neuron Programmers to change it to the required
communication setting.
26.
Is
20MHz selection available in LONBUILDER?
If the input clock for your Neuron Chip is 10MHz or less,
you can use the LONBUILDER or NODEBUILDER software to build
firmware images in the usual way.
These tools do not directly support the 20MHz input clock option that is available
with the 3120A20x and 3120FEx chips. In this case, you will need to use the NEI20MHZ.EXE
utility program, available from Echelon's web-site, to overcome this limitation.
To build an application for a Neuron Chip running with 20MHz input clock, use
your LONBUILDER or NODEBUILDER software to create the Neuron EEPROM Image file
(.NEI file), then post-process that file with the NEI20MHZ utility. This updates
the communications parameter record in the file. You can then download this modified
.NEI file to a Neuron Programmer to program the devices before soldering them
to your target hardware board.
27.
What
is the network bit rate of 20MHz Neuron Chips?
The factory default communication setting for Neuron 3120s
is 1.25 Mb/s. To change this setting, you will need to
use the Neuron Programmer. Please refer to the Neuron Programming
section for more details.
28.
When
selecting the 20MHz-clock option, do all the Neuron nodes
have to be configured at 20MHz?
If communicating at the maximum transmission speed (2.5Mbps),
all Neuron nodes must operate at 20MHz. If communicating
at 1.25Mbps, Neuron nodes can operate at either 10MHz or
20MHz. At lower communication speeds, Neurons can operate
at 5MHz, 10MHz, or 20MHz.
29.
What
is the operating frequency range?
625KHz to 20MHz input clock for TMPN3120A20x, TMPN3120FEx
625KHz to 10MHz input clock for TMPN3150B1AF, TMPN3120B1AM,
TMPN3120E1M.
30.
How
to use the NEI20MHZ utility?
31. How do you set the 20MHz input clock?
This is a simple DOS utility that post-processes the .NEI
file generated by LonBuilder or NodeBuilder in order to
modify the clock and communications parameters for 20MHz.
If your input clock is 10MHz or less, you do not need to
use this utility, even if your Neuron Chips are capable
of running at 20MHz. Enter NEI20MHZ at the DOS command
prompt for usage information:
Copyright (c) 1997 Echelon Corporation. All rights reserved Convert Neuron Chip
3120FEx .NEI file to 20MHz clock. Usage: NEI20MHZ -c file_name[.NEI]
Channel Name
Description
Minimum Clock Rate
TP/XF-78
Twisted Pair at 78kbps
5 MHz
TP/XF-1250
Twisted Pair at 1.25Mbps
10MHz
TP/FT-10
Free Topology or Link Power
5MHz
PL-10
Spread Spectrum Power Line
5MHz
TP/RS485-39
RS485 at 39kbps
5MHz
TP/RS485-78
RS485 at 78kbps
5MHz
TP/RS485-625
RS485 at 625kbps
5MHz
TP/RS485-1250
RS485 at 1.25Mbps
10MHz
TP/RS485-2500
RS485 at 2.5Mbps
20MHz
DC-78
Direct Connect at 78kbps
5MHz
DC-625
Direct Connect at 625kbps
5MHz
DC-1250
Direct Connect at 1.25Mbps
10MHz
DC-2500
Direct Connect at 2.5Mbps
20MHz
For example, if you wish to modify the file MY_NODE.NEI
for a 20MHz Neuron Chip with the TP/XF-1250 twisted pair
transceiver, enter:
NEI20MHZ -cTP/XF-1250 MY_NODE.NEI
This replaces the communications parameter record in the file with the communications
parameters appropriate to 20MHz and the TP/XF-1250 transceiver. If the utility
executes correctly, it will report, for example:
Neuron model number: 12, Firmware version: 9 Successfully
updated file MY_NODE.NEI to 20MHz operation on TP/XF-1250
channel. Neuron model number: 12, Firmware version: 9 Successfully
updated file MY_NODE.NEI to 20MHz operation on TP/XF-1250
channel.
Defined Neuron Chip model numbers are as follows:
Model
Number
3150
0
3120B1
8
3120E1
9
3120FE3
11
3120A20
12
3120FE5
13
Now that you have a suitable .NEI file, you can use the
Neuron Programmer to program your chips. Then solder the
chips into your target circuit board with the specified
transceiver. It is not possible to download 20MHz communications
parameters into a device over the network using LonBuilder
or NodeBuilder software.
32.
When a Neuron Chip is used at 20MHz, what
influence does it have on I/O function or a timer?
A 20MHz Neuron Chip will run most I/O models at twice
the speed specified for 10 MHz. The following table lists
some of the timings at 20MHz.
I/O Model
Timing
Parallel
1.2 µsec per byte
Bitshift
20 or 30 kbps
Magcard
Up to 16,668 bps
Magtrack1
Up to 14,492 bps
Neurowire Master
20 or 40 kbps
Neurowire Slave
Up to 36 kbps
Serial
2400, 4800 or 9600 bps
Touch
Not supported at 20 MHz
Frequency Output
Resolution 0.2 to 25.6 msec Maximum Range
13.1 to 1,678 msec
Other Timer/Counter
Resolution 0.1 to 12.8 msec Maximum Range
6.55 to 839 msec
Some timers have different specifications at 20 MHz,
as shown in the following table:
Parameter
Value
Watchdog timer
420 msec
Millisecond timers
1 to 32,000 msec
0Second timers
1 to 65,000 sec
delay() function
1 to 32,767 counts
get_tick_count() function
409.6 µsec per count
Other timers and time-related functions are not affected.
33.
Do
existing development tools support the 3120 Neuron Chips?
Yes, the existing development tools support the features
of the 3120 derivatives. There are a few software updates
needed to use certain features, and these are available
from Echelon's web-site. For more information, please see
the Software Updates section at: http://www.toshiba.com/taec/components/Generic/software_updates.jsp.
34.
Are
any evaluation tools for Neurons available from Toshiba?
No. For development using Neuron Chips, you need to obtain
Development Tools, either LONBUILDER and/or NODEBUILDER
from Echelon.
35.
I
have an older version of LONBUILDER? Do I need to upgrade
the Development Tools software?
If you're currently under development using the new 3120s
introduced by Toshiba, you may need to obtain software
updates from Echelon, as described in the Software Updates
section.
36.
I'm
having trouble with LONBUILDER not recognizing the new Neuron
3120 chips. What is the problem?
This happens if the LONBUILDER software does not have
the correct software update installed which includes symbol
tables for the new Neuron 3120s. By installing the recommended
LONBUILDER software update, this problem will be resolved.
Please refer to the Software Updates section for more details.
37.
What
is the current consumption of Neuron Chips?
Varies with frequency - 30mA (MAX) at 10MHz, 55mA (MAX)
at 20MHz.
38.
What
is the difference between TMPN3150B1AF, TMPN3150B1AF(BR,D)
and TMPN3150B1AF-BR-D?
TMPN3150B1AF-BR-D?
TMPN3150B1AF, TMPN3150B1AF(BR,D), and TMPN3150B1AF-BR-D refer to the exact same
part. The BR,D suffix at the end represents an internal packaging code .
39.
What
is the difference between TMPN3150B1F and TMPN3150B1AF?
TMPN3150B1AF is an improved version of TMPN3150B1F, and
can be used as a replacement for the older part. TMPN3150B1AF
has following additional features with respect to TMPN3150B1F:
3 clock delay circuit in Reset
Repairs a minor bug of an I/O object
40.
What
do the "-BR-D" and "-D" in some of the Neuron Chip part numbers
refer to?
These are internal packaging codes used by Toshiba, and
stand for the following: · BR - Lead Forming Type/Lead
Bending Format (for QFP Package only) · D - Dry
Pack .
41.
How
do you replace TMPN3120B1AM or TMPN3120E1M with TMPN3120A20M? 42. How do you replace
TMPN3120A20M with TMPN3120FE3M? 43. How do you replace
TMPN3120FE3M with TMPN3120FE5M?
TMPN3120A20M is pin-to-pin compatible with TMPN3120B1AM
and TMPN3120E1M. However, TMPN3120A20M has a different
firmware version as it has additional features such as
increased ROM. So, the application program needs to be
re-compiled/linked to use the TMPN3120A20M. Also, TMPN3120A20M,
TMPN3120FE3M and TMPN3120FE5M are pin-to-pin compatible
parts, with varying size of EEPROM and RAM. As your application
grows, you can replace the existing part with the one with
increased EEPROM and RAM. However, doing this also requires
you to re-build the application image as described below.
To rebuild (re-compile and link) the application program,
do the following:
Step 1: Make sure you have the most current software
for the LonBuilder or NodeBuilder development tools.
For information on development tools software update,
please refer to the Software Updates section. Note: Link
Software updates above in the web-page to: http://www.toshiba.com/taec/components/Generic/software_updates.jsp
Step 2: Using the LonBuilder development tool, follow
the procedure for building an application image. Refer
to the LonBuilder's User Guide for detailed instructions
on this procedure. Some of the key steps are described
below. Select App Node option from the LonBuilder's Home
menu.
1) From App Node menu options, select HW Properties,
and specify the following parameters:
HW Property Name:
<Select any name>
Neuron Chip:
<Select the Neuron Chop option as described below>
3120 option for 3120B1AM and 3120E1M
3120A20 option for 3120A20M and 3120A20U
3120E3 option for 3120FE3M and 3120FE3U
3120E5 option for 3120FE5M
Input Clock Rate:
<Select the clock rate between 0.625MHz to 10MHz>
For 20MHz clock rate, see the note below.
Neuron Chip Firmware:
<Leave this blank>
Firmware version:
0
Note: Current version of LonBuilder software does not
support selecting 20MHz input clock rate from the menu.
If you are using 20MHz clock, you can select any clock
rate in the option above (temporarily), and change it later
using the NEI20MHz.exe utility (as described in the step
# below).
2) From App Node menu options, select HW Properties, and
specify the following parameters:
App HW Name:
<Select any Name>
HW Type:
Custom Node
HW Prop. Name:
<Specify HW Property Name used in previous step>
Specify other parameters to be the same used in the previous
application image for the Neuron Chip that you are replacing.
For detailed information on selecting other steps, refer
to the LonBuilder's User Guide, available from Echelon.
3) From App Node menu options, select App Images, and specify the parameters
to be the same used in the previous application image for the Neuron Chip that
you are replacing.
4) From App Node menu options, select Node Specs, and
specify the following parameters:
Node Name:
<Select any Name>
App Image Name:
<Specify App Image Name defined in step 3 above>
Target HW Name:
<Specify Target HW Name defined in step 2 above>
Specify other parameters to be the same used in the previous
application image for the Neuron Chip that you are replacing.
5) Perform the build by selecting Automatic Build from LonBuilder's menu.
Note: In some cases, the size of application image generated may increase slightly
even if you didn't make any changes to the application code. This may be because
of a newer compiler version being used by LonBuilder. If you are replacing
E1M with A20M, since both of these have the same size of EEPROM, in a rare
scenario, the new application image generated may not fit into the EEPROM.
In such a case, you can address this by using compiler instructions (#pragma
codegen ***).
6) Select Node, and perform Export to create a .NEI file. Make sure to select "Intel
Hex format" as the Toshiba Neuron Programmer only supports the Intel Hex Format.
standard type
ECP
Unit
Common mode range(With hysteresis)
Min.
Vss+1.2
Vss+0.45
V
Max.
Vdd-2.2
Vdd+0.55
Common mode range(No hysteresis)
Min.
Vss+0.9
Vss-0.1
V
Max.
Vdd-1.75
Vdd+1.0V(COMM)7.0
Input offset voltage
Min.
-0.05?Vh-35
mV
Max.
0.05?Vh+35
Input resistance(at Vss to Vdd level)
Min
5 (1)
5 (2)
M-Ohm
Note: (1) This value applies to CP0-CP3 pins of
TMPN3120FE3M/U at power down. (2) This value applies to CP0-CP3 pins at power
up and down. (Vss?Vin?7.0V)
s The common mode range in the case of ECP is about 3 times compared to that
standard type communication port. This increases the margin to which the ground
level of each node may vary, when connected using a non-isolated direct connect
transceiver.
44.
Why is a service LED necessary?
The service pin of a Neuron Chip shows the Configuration State
of a chip. As shown in the following figure, if LED is connected
with resistance, the Configuration State of the present chip
can be checked in the state of LED.
The following three states are shown according
to the state of LED.
LED is OFF: Config State
The chip (node) is operating normally. All
the nodes under operation should be in this state
The node of this state has a communication
parameter, an application program, and address
information.
LED is Blinking (1/2Hz): Unconfig State
The node of this state has a communication parameter,
an application program.
By setting address information as the node of this state,
it shifts to a Config state and starts operating. ?LED
is dimly lit (76kHz): Application less State
All Neuron 3120 at shipping time is in this state. The
node of this state has only the communication parameter.\
Service LED is the method of knowing the Configuration State
of a node easily. It is highly useful at the time of installation/debugging
in the field. Even if there is no service LED, there is no
problem functionally. However, in order to make correspondence
at a trouble smooth, we recommend you to also prepare service
LED with a service pin switch (Please refer to Q**: of this
FAQ).
45.
Why is a service pin switch necessary?
The
service pin of a Neuron Chip can send out a message from
the
communication port to the network which contains the 48-bit
Neuron ID from communication port. By attaching the switch
for grounding a service pin, as shown in the following figure,
when required, a service pin message can be sent out.
If Low signal is inputted into a service pin,
a Neuron Chip will send out the service pin message
containing the 48-bit Neuron ID to a network from
communication port. This message is one of the
network management messages, and it is used frequently
in case a node is installed in a network. When
performing an address setup on the network where
two or more nodes exist to the node as which the
network address was not decided, the destination
address of the message used for a setup is required.
In this case, a Neuron ID can be used as a destination
address. If there is a service pin switch, since
the required Neuron ID can be taken out easily,
work of an address setup is smooth. Moreover, the
existence of the message transmission using the
service pin switch may be helpful as the check
method in case abnormalities are in communication.
For the above reason, we recommend you to also
prepare a service pin switch with service LED (Please
refer to Q**: of this FAQ).
46.
What is a Neuron ID?
Each
Neuron Chip has a unique 48-bit identifier called Neuron
ID.
At the time of manufacturing, a Neuron ID is permanently
written
into the EEPROM of each Neuron Chip. A user cannot rewrite
the Neuron ID stored in the EEPROM. Note: The Neuron ID can
be sent out by the Neuron Chip as a network management message
by giving a logic-low signal to the service pin. .
