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| TOSHIBA DEVELOPS NEW 8-BIT CORE WITH HIGH-SPEED PROCESSING AND LARGE-CAPACITY ADDRESS SPACE FOR NEXT-GENERATION MICROCONTROLLERS |
| New Core to Enable Feature-Rich, Next-Generation 8-Bit Devices with Low Power,
Low Voltage and Performance Comparable to 16-Bit MCUs |
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| SAN JOSE, Calif., September 6, 2006 — Toshiba America Electronic Components, Inc. (TAEC)* today announced that Toshiba Corporation (Toshiba) has developed a new 8-bit microcontroller (MCU) core. Designated TLCS-870/C1, the new core is capable of processing one instruction cycle in a single clock cycle, enabling faster processing at lower frequencies, reduced noise and lower power consumption compared with Toshiba’s previous 8-bit core. Its large-capacity address space is expandable to 128 Kbytes. The flexible TLCS-870/C1 core is well suited for a wide range of applications from small-scale applications, such as portable digital-consumer products, to large-scale applications requiring large-capacity ROM, such as air conditioners, washing machines, and other white goods.
“Toshiba’s new TLCS-870/C1 core heralds the
beginning of a new concept of 8-bit MCUs,” said Roland
Gehrmann, business development manager in the ASSP Business
Unit at TAEC. “Our next-generation TLCS-870/C1-based
8-bit MCUs will offer low power, low voltage and performance
comparable to that of 16-bit devices. In response
to customer feedback, the new family will help reduce system
cost by integrating must-have features such as a voltage-detection
circuit, a power-on reset circuit, and an on-chip debug
circuit.” TAEC plans to introduce its first
new products based on the new core in the fourth quarter
of 2006.
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| Development
Summary |
- The core architecture was modified from the previous
TLCS-870/C architecture to achieve the fast processing
of one instruction cycle in a single clock cycle. The result
was up to a four-fold increase in performance at the same
clock frequency, compared with existing Toshiba 8-bit MCUs.
- Part of the IC design used synchronous RTL design instead
of multiphase-clock design based on circuit diagrams.
- The expanded address space was attained with a memory-management
method that manages code and data in separate areas. Up
to 128 Kbytes of address space can be implemented in an
8-bit MCU without any adverse consequences such as increased
footprint due to address-bus expansion or degraded processing
speed, which is common with the alternative memory-bank
method.
- The TLCS-870/C1 core is binary compatible with previous
Toshiba 8-bit MCUs; thus, existing software resources can
be used. When used in combination with a Toshiba C compiler,
high code efficiency can be realized.
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| Comparison of New TLCS-870/C1 and Current-Generation TLCS-870/C Cores |
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TLCS-870/C1 |
TLCS-870/C |
| CPU Design Method |
RTL |
Circuit diagrams |
| One Instruction Cycle |
1 clock cycle |
4 clock cycles |
| Address Space (Maximum) |
128 Kbytes |
64 Kbytes |
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*About TAEC |
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Combining quality and flexibility with design engineering
expertise, TAEC brings a breadth of advanced, next-generation
technologies to its customers. This broad offering
includes memory and flash memory-based storage solutions,
a broad range of discrete devices, displays, medical tubes,
ASICs, custom SOCs, microprocessors, microcontrollers and
wireless components for the computing, wireless, networking,
automotive and digital consumer markets.
TAEC is an independent operating company owned by Toshiba
America, Inc., a subsidiary of Toshiba Corp. (Toshiba), Japan’s
largest semiconductor manufacturer and the world’s
fourth largest semiconductor manufacturer. In more
than 130 years of operation, Toshiba has recorded numerous
firsts and made many valuable contributions to technology
and society. For additional company and product information,
please visit TAEC’s website at chips.toshiba.com.
For technical inquiries, please e-mail Tech.Questions@taec.toshiba.com.
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Information in this press release, including
product pricing and specifications, content of services
and contact information, is current and believed to be
accurate on the date of the announcement, but is subject
to change without prior notice. Technical and application
information contained here is subject to the most recent
applicable Toshiba product specifications. In developing
designs, please ensure that Toshiba products are used within
specified operating ranges as set forth in the most recent
Toshiba product specifications and the information set
forth in Toshiba’s “Handling Guide for Semiconductor
Devices,” or “Toshiba Semiconductor Reliability
Handbook.” This information is available at www.chips.toshiba.com,
or from your TAEC representative.
All trademarks and tradenames used herein
are the properties of their respective holders. |
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| MCUS 06 443 |
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