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TOSHIBA STARTS SAMPLE SHIPPING OF SPURSENGINE™ SE1000
HIGH-PERFORMANCE STREAM PROCESSOR
Offering Development Environment to Advance Stream Processing Applications In the Full-HD Era
TOKYO, April 8, 2008 — Toshiba Corporation today announced the start of sample shipping of the SpursEngine™ SE1000 (SpursEngine), a high-performance stream processor integrating four Synergistic Processing Element (SPE) cores derived from the "Cell Broadband Engine™" (Cell/B.E.™). Sample shipping began today and Toshiba expects sales of 6 million units within the first three years of the SpursEngine's release.

SpursEngine is a co-processor that integrates a hardware codec for full HD encoding and decoding of MPEG-2 and H.264 streams with four SPEs derived from Cell/B.E. These advanced processing elements offer high performance media streaming capabilities, with a clock frequency of 1.5GHz, while achieving a low power consumption range of 10W to 20W.

"We are very pleased to have started sample shipping of the SpursEngine," said Yoshio Masubuchi, Director of Toshiba's System LSI Division, Advanced SoC Development Center . "The design of this powerful co-processor is dedicated to bringing the advanced capabilities of the Cell/B.E. to consumer electronics, particularly video processing in digital consumer products. We are sure that SpursEngine will accelerate the market for full-HD applications."

Toshiba will support developers working on SpursEngine applications with a comprehensive reference kit that includes a reference board and essential middleware APIs. The reference board has a PCI-Express edge connector that can connect to an x1 layer slot in a PC. Toshiba will also provide an integrated development environment (SPE compiler, SPE debugger and performance monitor) and sample applications that demonstrate how to use the provided middleware. With the reference kit, customers can quickly and easily construct an evaluation and development environment and accelerate product development.

Toshiba will further boost the performance and cut the power consumption of the SpursEngine to support further innovation in products offering new levels of functionality.

Co-operation between Toshiba and the SpursEngine™ SE1000 Partnerships

Toshiba is developing co-operative relationships with many partner companies in order to develop wide scope video solutions that utilize the SpursEngine. For example, Toshiba is partnering with Corel Corporation, whose headquarters are in Canada , and Taiwan-based CyberLink Corporation and Leadtek Research Inc. These companies produce popular video and image processing software and hardware, such as graphic boards, and will together supply to set manufacturers. By working together with these companies and creating a new value chain, many end users can enjoy a comfortable digital life by using partner boards and software bundled with the SpursEngine.

Outline of SpursEngine™ SE1000
Product Number BXA32110XBGN
Sample Shipping April 2008
Processor SPE 4 core
SPE Fully compliant with Cell/B.E.™ SPE Instruction Set
SIMD RISC/ Single & double -precision floating-point arithmetic / DMAC/MMU
Memory Interface (XDR™ DRAM) 128MB(512Mbit x2), Physical Bandwidth of 12.8GB/s
Hardware Video Codec Full HD Capable H.264 Encoder and Decoder
PCI-Express I/F x1, x4
PCI-Express Compliant with Base Specification Revision 1.1
Outline of SpursEngine™ Reference Kit
Hardware
Product Name
SpursEngine SE1000 Reference Kit
Model
BXK005000
Main Engine
SpursEngine SE1000
Processing Performance Maximum 48GFlops
12GFlops/1SPE
Element Core SPEx4
Operating Frequency 1.5GHz
Registers 128bit x 128/1SPE
Internal Memory

Local Storage 256KB/1SPE

Host Interface
PCI-Express

Functions Endpoint
1 lane link support
Compliant Base specification, Revision 1.1
Memory
XDR™DRAM
Physical Bandwidth 12.8GB/s
Memory Size 128MB
Software Basic software, libraries and tool chain for host and SPE program development.
Sample applications for user programs.
 

Information in this press release, including product pricing and specifications, content of services and contact information, is current and believed to be accurate on the date of the announcement, but is subject to change without prior notice. Technical and application information contained here is subject to the most recent applicable Toshiba product specifications. In developing designs, please ensure that Toshiba products are used within specified operating ranges as set forth in the most recent Toshiba product specifications and the information set forth in Toshiba's "Handling Guide for Semiconductor Devices," or "Toshiba Semiconductor Reliability Handbook." This information is available at chips.toshiba.com or from your TAEC representative.

*XDR™ DRAM is a trademark of Rambus Inc. in the United States and other countries.
*SpursEngine™ and the logo are trademarks of Toshiba Corporation.
*Cell Broadband Engine™ and Cell/B.E.™ are trademarks of Sony Computer Entertainment Inc.

 
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